Copper pillar bumps, which are one type of vertical interconnect technology, can be applied to semiconductor chips or other microelectronic device bond pads via copper pillar bumping technologies that are known to those familiar with the art. The copper pillar bumps are placed on the chips/devices while the chips/devices are still in their wafer form. All solder-based flip-chip and/or chip scale package (CSP) style interconnects (bumps) require suitable under bump metallurgy (UBM) to act as adhesion layers/diffusion barriers between the wafer/substrate metallization and the solder bump itself. Pillar bumps (copper, gold, or other metals/alloys) have the potential to be used as functional UBMs, provided that reliable/manufacturable methods are used to form the solder bumps on wafers.
A copper pillar bump offers a rigid vertical structure when compared to a typical solder bump or CSP interconnect. In applications where control of the stand-off between two surfaces, such as a device and its associated substrate, is required, the copper pillar bump acts as a fixed standoff to control that distance, while the solder performs the joint connection between the two surfaces. Controlling this stand-off is critical to overall system performance and reliability. Copper pillar bump structures also offer improved thermal transfer and resistivity compared to equivalent flipchip or CSP solder bump stand-offs. Use of preformed solder spheres increases overall solder volume in the joint, thereby enhancing joint connection strength.
Cu pillar bump structures have the potential to be a cost-effective, reliable interconnect option for certain markets in the microelectronics industry. However, reliable and low cost manufacturable methods are needed for building versatile fixed stand-off bump structures. Most pillar bump manufacturing methods use a photo-definable mask material to electroplate the pillar structure followed by an electroplated solder. Plating the solder is a slow, expensive process that requires considerable process control and strictly limits the solder to a common binary alloy. Typically, electroplating more than a binary solder alloy to form the solder portion of the pillar bump is very difficult to control in a manufacturing environment. In the semiconductor industry however, using various multiple element alloys or alloys doped with trace elements are desirable to improve the reliability of the interconnect.